FANCO-16 · Version 4 · October 2026

The Layered
Sound Chip

An idealized SID that grows into a grand system of phasors, operators, filters and delay lines — every value gliding, never jumping, at a guaranteed 48 kHz. Here is where the design stands.

Built in the prototype Decided, not built yet Proposed Future idea

01Signal flow

Every block runs on every sample whether it is heard or not, so the worst case is the only case — that is what makes the 48 kHz guarantee possible. Tap a block for details.

OPERATOR × 32 0400–07FF Smoothed scalars pitch · width · level · pan · send · cutoff · resonance · tap position · weights · feedback — every one glides to its target
built

Tap a block

Each block shows what it does, where its registers live, and whether it exists in the prototype or only in the plan.

Prototype at a glance
32operators
8state-variable filters
8delay lines × 2 taps, 10.9 s each
32generic ramps (to be replaced by per-scalar transitions)

02Inside an operator

Layers 0, 1 and 3 in one building block, plus one modulation input. Here a second operator modulates the phase of the first — the two-operator FM recipe behind the bell and the electric piano.

Phasor 0→1Modulator outputCarrier (waveform × envelope)Envelope

03Scalars never jump

Writing a scalar sets its target; a 16-bit transition register says how to get there. Two bits choose the kind, the rest is a time in minifloat form, and the chip enforces a minimum. Press Retarget to change the target halfway — watch for kinks.

04Why ramps stop clicks

An instant step contains every frequency, falling only 6 dB per octave — plenty lands where the ear is most sensitive. A ramp acts as a low-pass filter on that click; an S-curve, whose slope never jumps, filters far harder.

Instant stepLinear rampS-curve ramp

Shaded: 1–5 kHz, the ear's most sensitive band. Floors decided: 24 samples for the S-curve, 48 samples (1 ms) for linear and exponential. Separately, a value updated 120 times a second needs ~8 ms ramps or the steps buzz as “zipper noise”.

05Delay lines, taps and reverb

Delay memory belongs to the chip, invisible to the CPU, 219 float samples (10.9 s) per line. Cost scales with the number of taps, never with length. Tap positions are 16-bit minifloats: fine close in, coarse far away, always about 1 part in 4096.

Tap position code
–samples back
–time
–step size here
–exponent e · mantissa m
Echo patterns (impulse response)

06Number formats

The CPU computes in two's complement, so every signed register is two's complement too — the chip only decides how to scale it. Drag the raw 16-bit code and see three readings side by side.

0x4000
decided

Weight

s / 32767 · 0x8000 = −1
–

Pan, send, mix, feedback. Exactly ±1; feedback 1.0 freezes sound.

proposed

Gain

2^(s / 2048)
–

Drive, makeup gain. Even steps in dB; a ramp is a constant-dB fade.

built

Pitch

440·2^((p − 0x8000)/3072) Hz
–

256 steps per semitone. Also the filter-cutoff scale.

07One clock, three hosts

Inside the machine there is exactly one clock: 1,000,000 cycles per frame, 2500 cycles per sample, so picture and sound are in sync by definition. The browser only has to present that timeline.

08Decisions so far

From today's discussion, in order. The full reasoning is in docs/diary/2026-10-05-sid-discussion.md.

09Roadmap

From the prototype you can play today to the grand system.